1. Field of the Invention
The present invention relates to a phase synchronization circuit which is applicable to, for example, a carrier wave reproduction time shortening circuit of a synchronization detector installed in a demodulator of a digital wireless apparatus.
2. Description of Related Art
A synchronization detector installed in, for example, a demodulator of a digital wireless apparatus, detects a signal by demodulating a modulated signal based on a carrier wave reproduced on the receiving side. A phase synchronization circuit used to reproduce the carrier wave of this synchronization detector controls the phase and frequency of an output signal comparing the phase of the input signal with that of the output signal.
FIG. 1 is a block diagram showing the fundamental configuration blocks of this phase synchronization circuit. The fundamental operation of this circuit will be described below. First, the phase comparator (PC) 10 detects the phase difference between the phase of an input signal to be used as a reference and the phase of the output signal of the voltage control oscillator (VCO) 30 that is oscillating near a frequency to be output. The loop filter 20 then generates a control voltage based on the detected phase difference and supplies the control voltage to the VCO 30 to change the oscillation frequency of the VCO 30. In this case, the oscillation frequency of the output signal is stabilized by feeding back the changed oscillation frequency of the VCO 30 to the PC 10 so that phase difference between the input signal and output signal of the VCO 30 will be eliminated.
FIG. 2 shows the relation between the synchronization holding range (lock-in range), frequency pull-in range, and free-running frequency of the VCO (oscillation frequency when the input to VCO is zero). Here, the synchronization holding range is a range of frequency in which the state of synchronization (the state in which the phase is locked in) can be held when the frequency of the input signal is gradually removed from the free-running frequency of the VCO. The frequency pull-in range is a range of frequency in which the output signal in the state of non-synchronization can be synchronized with the input signal when the frequency of the input signal is approached gradually to the free-running frequency of the VCO. In general, the SN ratio (signal-to-noise ratio) deteriorates as the synchronization holding range and frequency pull-in range become wider.
FIG. 3 is a block diagram showing the configuration blocks of the phase synchronization circuit having the above-described fundamental structure and operation. This phase synchronization circuit is used in a synchronization detector installed in a demodulator of a digital wireless apparatus. In FIG. 3, the same reference numerals are assigned to those components that are shown in FIG. 1.
In FIG. 3, the phase comparator 10 has a distributor 11, two-phase demodulators 12 and 13, analog LPFs (low pass filters) 14 and 15, an amplifier 16, A/D converters 17 and 18, and a waveform reshaping demodulating circuit 19. The loop filter 20 has a level shift 21. The voltage control oscillator 30 has a reference carrier wave VCO 31, a distributor 32, 1/2 dividers 33 and 34, and a .pi./2 shifter 35. In addition, this phase comparator 10 has a clock reproduction circuit 40, an alarm circuit 50, a sweep control signal generating unit 58, and a sweep circuit 60. The sweep control signal generating unit 58 may be installed inside the wave-form reshaping demodulating circuit 19.
In FIG. 3, the distributor 11 distributes a received modulated signal to the two-phase demodulators 12 and 13. The carrier signal reproduced by the VCO 30 is also supplied to the two-phase demodulators 12 and 13. Each of the two-phase demodulators 12 and 13 generates a phase difference signal in accordance with the phase difference between these two signals. These two-phase demodulators 12 and 13 have a multiplication function like, for example, a ring demodulator. Output signals of the two-phase demodulators 12 and 13 contain unwanted higher harmonics. The analog LPFs 14 and 15 remove these unwanted higher harmonics.
The amplifier 16 amplifies the phase difference signals supplied from the analog LPFs 14 and 15 that have eliminated the unwanted higher harmonics and then send the resultant phase difference signals to the A/D converters 17 and 18, respectively. The A/D converters 17 and 18 then convert the phase difference signals into digital signals, and send the converted digital signals to the waveform reshaping demodulating circuit 19.
The waveform reshaping demodulating circuit 19 reshapes the given phase difference signal while removing noise and distortion from the given phase difference signal to generate a reshaped phase difference signal and demodulates the original data signal based on the reshaped phase difference signal. In addition, the waveform reshaping demodulating circuit 19 generates a control signal based on the phase difference signals from the A/D converters 17 and 18 and supplies the control signal to the level shift 21. The level shift 21 then generates a control voltage and supplies the control voltage to the reference carrier wave VCO 31.
The reference carrier wave VCO 31 reproduces a reference carrier signal having a frequency that corresponds to the given control voltage, and sends the reference carrier signal to the two-phase demodulators 12 and 13 via the distributor 32, 1/2 dividers 33 and 34, and .pi./2 shifter 35.
The clock generating circuit 40 reproduces a clock signal based on the phase difference signal supplied from the amplifier 16. The alarm circuit 50 generates an alarm signal when the modulated signal cannot be received.
The phase synchronization circuit shown in FIG. 3 further has a sweep control signal generating unit 58 and a sweep circuit 60 in addition to the basic circuit structure of the phase synchronization circuit shown in FIG. 1. The control signal output from the waveform reshaping demodulating circuit 19 is supplied to the sweep control signal generating circuit 58. The sweep control signal generating circuit 58 determines whether the modulated signal is in synchronization with the output signal of the voltage control oscillator 30 based on this control signal. If these signals are not synchronized, the sweep control signal generating circuit 58 sends a sweep start control signal to the sweep circuit 60. The sweep control signal generating circuit 58 sends a sweep stop control signal to the sweep circuit 60 when the modulated signal becomes synchronized with the output signal of the voltage control oscillator 30.
FIG. 4 shows an exemplary operation characteristic of the sweep circuit 60. In this example, the sweep circuit 60 is a Wien-Bridge oscillator whose oscillation frequency is several Hz. The sweep circuit 60 oscillates or stops oscillating based on an impedance difference. When the sweep start control signal is supplied to the sweep circuit 60, the sweep circuit 60 outputs a sweep wave, which is a sine wave as shown in FIG. 4. This sweep wave is supplied to the reference carrier wave VCO 31. The reference carrier wave VCO 31 changes its free-running frequency based on the level of the sweep wave. As a result, the frequency pull-in range is expanded.
FIG. 5(a) shows the frequency characteristic of the phase synchronization circuit shown in FIG. 1 that does not have the sweep circuit 60. The centers of the frequency pull-in range and synchronization holding range of the phase synchronization circuit shown in FIG. 1 coincide approximately with the free-running frequency of the phase synchronization circuit.
FIG. 5(b) shows the range of the free-running frequency of the phase synchronization circuit having the sweep circuit 60 shown in FIG. 3. The oscillation of the sweep circuit 60 determines the range of the free-running frequency of the reference carrier wave VCO 31. In other words, the range of the free-running frequency of the reference carrier wave VCO 31 is expanded based on the amplitude of the sweep wave shown in FIG. 4 generated by the sweep circuit 60.
FIG. 5(c) shows the apparent frequency pull-in range and apparent synchronization holding range based on the free-running frequency of the reference carrier wave VCO 31 shown in FIG. 5(b). Comparing FIG. 5(c) with FIG. 5(a), it becomes evident that the apparent frequency pull-in range and apparent synchronization holding range shown in FIG. 5(c) are wider than the apparent frequency pull-in range and apparent synchronization holding range shown in FIG. 5(a), respectively.
In this case, the influence of the input noise is the same as in the case of the previously described basic circuit of the phase synchronization circuit. Hence, the quality of communication deteriorates when the SN ratio deteriorates. Therefore, in this case also, the quality of communication is maintained by confining the synchronization holding range and frequency pull-in range within a narrow band.
FIG. 6 shows lengths of time the phase synchronization circuit used in the conventional synchronization detector requires to be synchronized with the input frequencies. One period of the sweep is 1/f.sub.0, where f.sub.0 is the oscillation frequency of the sweep circuit 60. The length of time require to be synchronized with the input frequency A is 1/4 period of the sweep (1/4.times.1/f.sub.0). The length of time required to be synchronized with the input frequency B is 3/4 period of the sweep (3/4.times.1/f.sub.0). Therefore, when this phase synchronization circuit transits from a synchronized state to a non-synchronized state as a result of change in the input frequency, the maximum length of time required to return to the synchronized state from the non-synchronized state (synchronization pull-in time) is equal to 3/4 period of the sweep as described by the following equation.
3/4.times.1/f.sub.0 [sec] Equation 1
f.sub.0 : oscillation frequency of sweep circuit 60 PA1 generating the oscillation signal having a frequency that corresponds to said control voltage onto which said sweep wave is superposed.
During this non-synchronized state, communication between the apparatuses is terminated. Therefore, it is desirable that the synchronization pull-in time be as short as possible.
However, the synchronization response speed of the conventional phase synchronization circuit is slow since the synchronization holding range and frequency pull-in range are confined within a narrow band. Therefore, if the period of one sweep is shortened by increasing the oscillation frequency of the sweep circuit so as to shorten the length of the frequency pull-in time, the conventional phase synchronization circuit cannot respond to the sweep circuit, which is a problem.
For this reason, a phase synchronization circuit capable of shortening the length of the synchronization pull-in time is in demand.